|  Evaluation Modules TSBKPCI PCILynx and 200Mbps PHY -- value board TSBKPCITST PCILynx and 200Mbps PHY -- Feature Rich Designer's Kit TSBKBACKPL Backplane Designer's Kit TSBKPRPHRL TSB12C01A/ TSB11C01 Peripheral Designer's Kit
| | | | TSBKBACKPL Backplane Designer's Kit Board
Product Features Three link layer devices connect to a backplane (TSB14C01), 100Mbps (TSB11C01) and 200Mbps (TSB21LV03) PHYs.Uses the TMS320C52, 16-bit fixed point DSP as the controlling processor.Software allows packet transfers for testing.
The TSBKBACKPL Designer's Kit is composed of three TSB12C01A link layer controllers connected to the TSB11C01, TSB21LV03, and TSB14C01 physical layer devices. The TSB12C01As are connected to a common 32-bit central bus. The TSB11C01 and TSB21LV03 connect directly to the cable environment at 100Mbps and 200Mbps respectively. In this application, the TSB14C01 connects to an FB1650 transceiver, which connects to a BTL (Futurebus+) backplane bus. The controlling processor is TI's TMS320C52, 16-bit fixed point DSP. The DSP handles a one-port RS-232 asynchronous interface. Software: The software runs a text based menu for executing simple packet transfers for testing purposes. It interfaces to one TSB12C01A link layer controller at a time and allows switching among them. It requires a 38.4 KBaud terminal and a custom 6 wire RS-232 cable. TI provides source code that gives examples of how to use the DMA to read and write to the TSB12C01A link layer chip and execute transfers between the TSB12C01A and the local SRAM.
To order the TSBKBACKPL Designer's Kit, please contact your local Authorized Distributor, contact your local sales officeOR in USA call the Texas Instruments Literature Response Center at 800-477-8924, ext. 5800 specifying part number: TSBKBACKPL Price: $2,000 | | |